Branch Coverage

blib/lib/Verilog/VCD/Writer.pm

Criterion	Covered	Total	%
branch	6	8	75.0

line	true	false	branch
37	1	1	if (defined $self->vcdfile) { }
38	0	1	unless open $fh, '>', $self->vcdfile
40	0	1	unless open $fh, '>-'
92	6	6	if ($sig->width == 1) { }