Subroutine Coverage
| blib/lib/Verilog/CodeGen.pm |
|
| Criterion |
Covered |
Total |
% |
| subroutine |
9 |
23 |
39.1
|
| pod |
10 |
16 |
62.5
|
| line |
count |
pod |
subroutine |
|
3
|
1 |
n/a |
BEGIN |
|
17
|
1 |
n/a |
BEGIN |
|
19
|
1 |
n/a |
BEGIN |
|
48
|
0 |
Yes |
new |
|
70
|
1 |
n/a |
BEGIN |
|
87
|
0 |
Yes |
output |
|
129
|
0 |
Yes |
modules |
|
156
|
0 |
Yes |
module |
|
163
|
0 |
Yes |
instance |
|
217
|
0 |
Yes |
inst |
|
268
|
0 |
Yes |
search |
|
283
|
0 |
Yes |
find_inst |
|
307
|
0 |
Yes |
run |
|
324
|
0 |
Yes |
plot |
|
345
|
0 |
No |
dec2bin |
|
370
|
0 |
No |
splitbus |
|
420
|
0 |
No |
combinebus |
|
468
|
2 |
No |
make_module |
|
473
|
1 |
n/a |
BEGIN |
|
563
|
1 |
No |
create_code_template |
|
567
|
1 |
n/a |
BEGIN |
|
612
|
0 |
No |
create_objtest_code |
|
616
|
1 |
n/a |
BEGIN |