Condition Coverage

blib/lib/Verilog/VCD.pm
Criterion Covered Total %
condition 9 9 100.0


and 3 conditions

line !l l&&!r l&&r condition
152 12 2 2 $num_sigs > 1 and $use_stdout

or 3 conditions

line l !l&&r !l&&!r condition
133 3 46 30 exists $usigs{$full_name} or $all_sigs
165 126 24 18 / ^ ([01zx]) (.+) /xi or / ^ [br] (\S+) \s+ (.+) /xi