Branch Coverage

blib/lib/Verilog/Netlist/Cell.pm
Criterion Covered Total %
branch 34 42 80.9


line true false branch
63 87 47 if (not $self->submod)
64 87 0 if (my $name = $self->submodname)
67 42 45 unless ($sm)
69 0 42 if $name ne $name2
72 45 42 if ($sm)
83 2 102 if (not $self->submod and Verilog::Language::is_gateprim($self->submodname))
86 25 5 if (not $self->submod || $self->gateprim || $self->module->is_libcell and $self->netlist->{'link_read'} and not $self->netlist->{'_missing_submod'}{$self->submodname})
92 0 25 if $Verilog::Netlist::Debug
98 5 20 unless ($self->submod)
103 5 20 unless ($self->submod)
105 5 0 $self->netlist->{'link_read_nonfatal'} ? :
108 5 20 unless ($self->submod)
122 0 3 unless ($self->submod or $self->gateprim or $self->netlist->{'link_read_nonfatal'})
125 39 0 if ($self->netlist->{'use_vars'})
135 10 19 if ($self->params)
139 2 27 if ($self->range)
145 22 15 if $comma
149 29 0 wantarray ? :
157 15 22 if ($self->params || '') ne ""
159 33 4 if ($self->submod)
162 37 0 if (not $norecurse)