Condition Coverage

blib/lib/Verilog/EditFiles.pm
Criterion Covered Total %
condition 17 27 62.9


and 3 conditions

line !l l&&!r l&&r condition
84 2 1 4 not $commented and $1 eq '//'
2 0 1 not $commented and $1 eq '/*'
0 1 1 $commented and $1 eq '*/'
93 0 23 3 not $commented and $line =~ /^\s*(module|primitive)\s+([A-Za-z0-9_]+)/
0 21 2 not $commented and $line =~ /^\s*end(module|primitive)\b/
0 21 0 not $commented and $line =~ /^\s*\`timescale\s.*/
21 0 0 not $commented and $line =~ /^\s*\`timescale\s.*/ and $self->{'timescale_removal'}
0 19 2 not $commented and $line =~ /^\s*\`(end)?celldefine\b/
19 2 0 not $commented and $line =~ /^\s*\`(end)?celldefine\b/ and $self->{'celldefine'}