File Coverage

test_dir/vregs_spec_defs.pm
Criterion Covered Total %
statement 381 381 100.0
branch n/a
condition n/a
subroutine 127 127 100.0
pod n/a
total 508 508 100.0


line stmt bran cond sub pod time code
1             #DO NOT EDIT -- Generated automatically by vregs
2             #DESCRIPTION: Register Information: Generated automatically by vregs
3             #
4             #See SystemC::Vregs::Rules file: vregs_spec__rules.pl
5             #
6             #
7             #package vregs_spec
8             #
9             #**********************************************************************
10             # General convention:
11             # RA_{regname} Register beginning address
12             # RAE_{regname} Register ending address + 1
13             # RAC_{regname} Number of entries in register
14             # RAM_{regname} Register region address mask
15             # RRP_{regname} Register RANGE spacing in bytes, if arrayed
16             # RRS_{regname} Register RANGE size, if arrayed
17             #
18             # RBASEA_{regs} Register common-prefix starting address
19             # RBASEAE_{regs} Register common-prefix ending address + 1
20             # RBASEAM_{regs} Register common-prefix bit mask
21             #
22             # E_{enum}_{alias} Value of enumeration encoding
23             #
24             # CM{w}_{class}_WRITABLE Mask of all writable bits
25             # CB{w}_{class}_{field}_{f} Class field starting bit
26             # CE{w}_{class}_{field}_{f} Class field ending bit
27             # CR{w}_{class}_{field}_{f} Class field range
28             # {w}=32=bit word number, {f}=field number if discontinuous
29              
30              
31              
32              
33             {
34 1     1   559082 no warnings 'portable';
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35 1     1   6 use constant CMP_DEFINED_FOOD => 0x00000000feed; # Definition of Food
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36 1     1   7 use constant CMP_DEFINED_ONE => 0x1; # Definition One
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37 1     1   29 use constant FREE_DOUBLE => -1.2345; # Definition
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38 1     1   5 use constant FREE_Stringdef => Foobar; # Definition
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39              
40              
41             #Automatic Defines
42 1     1   6 use constant RA_ExReg1 => 0x18FFFF0000; # Address of R_ExReg1
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43 1     1   174 use constant RAE_ExReg1 => 0x18FFFF0004; # Ending Address of Register + 1
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44 1     1   5 use constant RAC_ExReg1 => 0x00000001; # Number of entries
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45 1     1   6 use constant RRP_ExReg1 => 0x0000000000; # Range spacing
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46 1     1   7 use constant RA_ExRegTwo => 0x18FFFF1000; # Address of R_ExRegTwo
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47 1     1   5 use constant RAE_ExRegTwo => 0x18FFFF1074; # Ending Address of Register + 1
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48 1     1   10 use constant RAC_ExRegTwo => 0x00000008; # Number of entries
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49 1     1   6 use constant RRP_ExRegTwo => 0x0000000010; # Range spacing
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50 1     1   4 use constant RRS_ExRegTwo => Non_Contiguous; # Range byte size: This register region contains gaps.
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51 1     1   7 use constant RAM_ExRegTwo => Not_Aligned; # Address Mask: This register is not naturally aligned, so a mask will not work.
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52 1     1   4 use constant RA_ExRegQuad => 0x18FFFF2000; # Address of R_ExRegQuad
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53 1     1   5 use constant RAE_ExRegQuad => 0x18FFFF2040; # Ending Address of Register + 1
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54 1     1   5 use constant RAC_ExRegQuad => 0x00000008; # Number of entries
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55 1     1   5 use constant RRP_ExRegQuad => 0x0000000008; # Range spacing
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56 1     1   5 use constant RRS_ExRegQuad => 0x0000000040; # Range byte size
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57 1     1   5 use constant RAM_ExRegQuad => 0x000000003F; # Address Mask
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58 1     1   6 use constant RBASEA_Ex => 0x18FFFF0000; # Base address of Ex registers
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59 1     1   5 use constant RBASEAE_Ex => 0x18FFFF2040; # Ending base address of Ex registers
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60 1     1   5 use constant RBASEAM_Ex => 0x0000003FFF; # Address Mask (may be forced to power-of-two)
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61 1     1   5 use constant RBASEA_ExReg => 0x18FFFF1000; # Base address of ExReg registers
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62 1     1   5 use constant RBASEAE_ExReg => 0x18FFFF2040; # Ending base address of ExReg registers
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63 1     1   6 use constant RBASEAM_ExReg => 0x0000001FFF; # Address Mask (may be forced to power-of-two)
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64 1     1   5 use constant CSIZE_ExBase => 8; # Class Size
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65 1     1   4 use constant CB_ExBase_Cmd => 28; # Field Start Bit: w0[31:28] RW X: Command Number
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66 1     1   4 use constant CE_ExBase_Cmd => 31; # Field End Bit: w0[31:28] RW X: Command Number
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67 1     1   4 use constant CB_ExBase_CmdAck => 28; # Field Start Bit: w0[28] RW X: Command Needs Acknowledge
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68 1     1   4 use constant CE_ExBase_CmdAck => 28; # Field End Bit: w0[28] RW X: Command Needs Acknowledge
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69 1     1   4 use constant CB_ExBase_FiveBits => 24; # Field Start Bit: w0[27:24] RW X: Five Bits
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70 1     1   11 use constant CE_ExBase_FiveBits => 27; # Field End Bit: w0[27:24] RW X: Five Bits
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71 1     1   5 use constant CB_ExBase_Address_1 => 32; # Field Start Bit: w0[15:0],w1[31:0] RW X: Address
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72 1     1   4 use constant CE_ExBase_Address_1 => 63; # Field End Bit: w0[15:0],w1[31:0] RW X: Address
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73 1     1   5 use constant CB_ExBase_Address_2 => 0; # Field Start Bit: w0[15:0],w1[31:0] RW X: Address
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74 1     1   4 use constant CE_ExBase_Address_2 => 15; # Field End Bit: w0[15:0],w1[31:0] RW X: Address
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75 1     1   5 use constant CB1_ExBase_Address_1 => 0; # Field Start Bit: w0[15:0],w1[31:0] RW X: Address
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76 1     1   5 use constant CE1_ExBase_Address_1 => 31; # Field End Bit: w0[15:0],w1[31:0] RW X: Address
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77 1     1   4 use constant CB0_ExBase_Address_2 => 0; # Field Start Bit: w0[15:0],w1[31:0] RW X: Address
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78 1     1   4 use constant CE0_ExBase_Address_2 => 15; # Field End Bit: w0[15:0],w1[31:0] RW X: Address
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79 1     1   4 use constant CSIZE_ExExpand => 16; # Class Size
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80 1     1   5 use constant CB_ExExpand_Base2Cmd => 92; # Field Start Bit: 95:92 RW X: Command Number
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81 1     1   4 use constant CE_ExExpand_Base2Cmd => 95; # Field End Bit: 95:92 RW X: Command Number
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82 1     1   3 use constant CB2_ExExpand_Base2Cmd => 28; # Field Start Bit: 95:92 RW X: Command Number
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83 1     1   3 use constant CE2_ExExpand_Base2Cmd => 31; # Field End Bit: 95:92 RW X: Command Number
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84 1     1   4 use constant CB_ExExpand_Base2CmdAck => 92; # Field Start Bit: 92:92 RW X: Command Needs Acknowledge
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85 1     1   4 use constant CE_ExExpand_Base2CmdAck => 92; # Field End Bit: 92:92 RW X: Command Needs Acknowledge
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86 1     1   4 use constant CB2_ExExpand_Base2CmdAck => 28; # Field Start Bit: 92:92 RW X: Command Needs Acknowledge
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87 1     1   3 use constant CE2_ExExpand_Base2CmdAck => 28; # Field End Bit: 92:92 RW X: Command Needs Acknowledge
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88 1     1   4 use constant CB_ExExpand_Base2FiveBits => 88; # Field Start Bit: 91:88 RW X: Five Bits
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89 1     1   8 use constant CE_ExExpand_Base2FiveBits => 91; # Field End Bit: 91:88 RW X: Five Bits
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90 1     1   4 use constant CB2_ExExpand_Base2FiveBits => 24; # Field Start Bit: 91:88 RW X: Five Bits
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91 1     1   4 use constant CE2_ExExpand_Base2FiveBits => 27; # Field End Bit: 91:88 RW X: Five Bits
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92 1     1   4 use constant CB_ExExpand_Base2Address_1 => 96; # Field Start Bit: 79:64,127:96 RW X: Address
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93 1     1   5 use constant CE_ExExpand_Base2Address_1 => 127; # Field End Bit: 79:64,127:96 RW X: Address
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94 1     1   4 use constant CB_ExExpand_Base2Address_2 => 64; # Field Start Bit: 79:64,127:96 RW X: Address
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95 1     1   6 use constant CE_ExExpand_Base2Address_2 => 79; # Field End Bit: 79:64,127:96 RW X: Address
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96 1     1   6 use constant CB3_ExExpand_Base2Address_1 => 0; # Field Start Bit: 79:64,127:96 RW X: Address
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97 1     1   5 use constant CE3_ExExpand_Base2Address_1 => 31; # Field End Bit: 79:64,127:96 RW X: Address
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98 1     1   4 use constant CB2_ExExpand_Base2Address_2 => 0; # Field Start Bit: 79:64,127:96 RW X: Address
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99 1     1   4 use constant CE2_ExExpand_Base2Address_2 => 15; # Field End Bit: 79:64,127:96 RW X: Address
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100 1     1   5 use constant CB_ExExpand_Base1Cmd => 28; # Field Start Bit: 31:28 RW X: Command Number
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101 1     1   5 use constant CE_ExExpand_Base1Cmd => 31; # Field End Bit: 31:28 RW X: Command Number
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102 1     1   6 use constant CB_ExExpand_Base1CmdAck => 28; # Field Start Bit: 28:28 RW X: Command Needs Acknowledge
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103 1     1   5 use constant CE_ExExpand_Base1CmdAck => 28; # Field End Bit: 28:28 RW X: Command Needs Acknowledge
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104 1     1   5 use constant CB_ExExpand_Base1FiveBits => 24; # Field Start Bit: 27:24 RW X: Five Bits
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105 1     1   5 use constant CE_ExExpand_Base1FiveBits => 27; # Field End Bit: 27:24 RW X: Five Bits
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106 1     1   5 use constant CB_ExExpand_Base1Address_1 => 32; # Field Start Bit: 15:0,63:32 RW X: Address
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107 1     1   4 use constant CE_ExExpand_Base1Address_1 => 63; # Field End Bit: 15:0,63:32 RW X: Address
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108 1     1   11 use constant CB_ExExpand_Base1Address_2 => 0; # Field Start Bit: 15:0,63:32 RW X: Address
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109 1     1   6 use constant CE_ExExpand_Base1Address_2 => 15; # Field End Bit: 15:0,63:32 RW X: Address
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110 1     1   5 use constant CB1_ExExpand_Base1Address_1 => 0; # Field Start Bit: 15:0,63:32 RW X: Address
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111 1     1   6 use constant CE1_ExExpand_Base1Address_1 => 31; # Field End Bit: 15:0,63:32 RW X: Address
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112 1     1   5 use constant CB0_ExExpand_Base1Address_2 => 0; # Field Start Bit: 15:0,63:32 RW X: Address
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113 1     1   5 use constant CE0_ExExpand_Base1Address_2 => 15; # Field End Bit: 15:0,63:32 RW X: Address
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114 1     1   5 use constant CSIZE_ExReg1 => 4; # Class Size
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115 1     1   5 use constant CB_ExReg1_LastCmd => 28; # Field Start Bit: 31:28 RW X: Enumerated field
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116 1     1   5 use constant CE_ExReg1_LastCmd => 31; # Field End Bit: 31:28 RW X: Enumerated field
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117 1     1   5 use constant CB_ExReg1_ReadHard => 21; # Field Start Bit: 21 RH X: Read Only Bits
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118 1     1   4 use constant CE_ExReg1_ReadHard => 21; # Field End Bit: 21 RH X: Read Only Bits
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119 1     1   6 use constant CB_ExReg1_ReadOnly => 20; # Field Start Bit: 20 R 1: Read hardwired Bits
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120 1     1   5 use constant CE_ExReg1_ReadOnly => 20; # Field End Bit: 20 R 1: Read hardwired Bits
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121 1     1   5 use constant CB_ExReg1_LowBits => 0; # Field Start Bit: 3:0 RW 0: Random Low Bits
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122 1     1   5 use constant CE_ExReg1_LowBits => 3; # Field End Bit: 3:0 RW 0: Random Low Bits
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123 1     1   6 use constant CSIZE_ExRegQuad => 8; # Class Size
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124 1     1   4 use constant CB_ExRegQuad_Bit63 => 63; # Field Start Bit: 63 RW 0: Bit 63
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125 1     1   5 use constant CE_ExRegQuad_Bit63 => 63; # Field End Bit: 63 RW 0: Bit 63
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126 1     1   5 use constant CB1_ExRegQuad_Bit63 => 31; # Field Start Bit: 63 RW 0: Bit 63
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127 1     1   4 use constant CE1_ExRegQuad_Bit63 => 31; # Field End Bit: 63 RW 0: Bit 63
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128 1     1   4 use constant CB_ExRegQuad_Bit62 => 62; # Field Start Bit: w1[30] RW 0: Bit 62
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129 1     1   4 use constant CE_ExRegQuad_Bit62 => 62; # Field End Bit: w1[30] RW 0: Bit 62
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130 1     1   4 use constant CB1_ExRegQuad_Bit62 => 30; # Field Start Bit: w1[30] RW 0: Bit 62
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131 1     1   8 use constant CE1_ExRegQuad_Bit62 => 30; # Field End Bit: w1[30] RW 0: Bit 62
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132 1     1   4 use constant CB_ExRegQuad_WideField => 0; # Field Start Bit: 31:0 RW 0: Wide Field
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133 1     1   4 use constant CE_ExRegQuad_WideField => 31; # Field End Bit: 31:0 RW 0: Wide Field
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134 1     1   5 use constant CSIZE_ExRegTwo => 4; # Class Size
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135 1     1   5 use constant CB_ExRegTwo_WideField => 0; # Field Start Bit: 31:0 RW 0: Wide Field
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136 1     1   4 use constant CE_ExRegTwo_WideField => 31; # Field End Bit: 31:0 RW 0: Wide Field
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137 1     1   4 use constant CSIZE_ExClassOne => 8; # Class Size
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138 1     1   5 use constant CB_ExClassOne_Cmd => 28; # Field Start Bit: w0[31:28] RW ONE: Command Number
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139 1     1   4 use constant CE_ExClassOne_Cmd => 31; # Field End Bit: w0[31:28] RW ONE: Command Number
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140 1     1   4 use constant CSIZE_ExClassTwo => 12; # Class Size
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141 1     1   4 use constant CB_ExClassTwo_Payload => 64; # Field Start Bit: w2[31:0] RW X: Another field that this message tacks onto the end of the base class
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142 1     1   5 use constant CE_ExClassTwo_Payload => 95; # Field End Bit: w2[31:0] RW X: Another field that this message tacks onto the end of the base class
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143 1     1   4 use constant CB2_ExClassTwo_Payload => 0; # Field Start Bit: w2[31:0] RW X: Another field that this message tacks onto the end of the base class
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144 1     1   4 use constant CE2_ExClassTwo_Payload => 31; # Field End Bit: w2[31:0] RW X: Another field that this message tacks onto the end of the base class
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145 1     1   5 use constant CB_ExClassTwo_Cmd => 28; # Field Start Bit: w0[31:28] RW TWO: Command Number
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146 1     1   4 use constant CE_ExClassTwo_Cmd => 31; # Field End Bit: w0[31:28] RW TWO: Command Number
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147 1     1   4 use constant CB_ExClassTwo_FiveBits => 24; # Field Start Bit: w0[27:24] RW X: Five Bits
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148 1     1   4 use constant CE_ExClassTwo_FiveBits => 27; # Field End Bit: w0[27:24] RW X: Five Bits
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149 1     1   4 use constant E_ExEnum_ONE => 0x1; # Enum Value: Command One
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150 1     1   3 use constant E_ExEnum_TWO => 0x2; # Enum Value: Command Two
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151 1     1   4 use constant E_ExEnum_FIVE => 0x5; # Enum Value: Command Five
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152 1     1   4 use constant E_ExEnum_FOURTEEN => 0xe; # Enum Value: Command Fourteen
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153 1     1   4 use constant E_ExSuperEnum_A => 0x20; # Enum Value: Sub Enum A ENUM:ExEnum
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154 1     1   8 use constant E_ExSuperEnum_A_ONE => 0x21; # Enum Value: Sub Enum A Command One
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155 1     1   4 use constant E_ExSuperEnum_A_TWO => 0x22; # Enum Value: Sub Enum A Command Two
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156 1     1   4 use constant E_ExSuperEnum_A_FIVE => 0x25; # Enum Value: Sub Enum A Command Five
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157 1     1   4 use constant E_ExSuperEnum_A_FOURTEEN => 0x2e; # Enum Value: Sub Enum A Command Fourteen
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158 1     1   5 use constant E_ExSuperEnum_B => 0x30; # Enum Value: Sub Enum B ENUM:ExEnum
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159 1     1   3 use constant E_ExSuperEnum_B_ONE => 0x31; # Enum Value: Sub Enum B Command One
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160 1     1   5 use constant E_ExSuperEnum_B_TWO => 0x32; # Enum Value: Sub Enum B Command Two
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161 1     1   5 use constant E_ExSuperEnum_B_FIVE => 0x35; # Enum Value: Sub Enum B Command Five
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162 1     1   4 use constant E_ExSuperEnum_B_FOURTEEN => 0x3e; # Enum Value: Sub Enum B Command Fourteen
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163 1     1   4 use constant E_ExSuperEnum_PRELAST => 0xfe; # Enum Value: Simple values
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164             }
165             1;
166              
167             #DO NOT EDIT -- Generated automatically by vregs