File Coverage

blib/lib/Device/Chip/nRF24L01P.pm
Criterion Covered Total %
statement 227 263 86.3
branch 20 42 47.6
condition 8 20 40.0
subroutine 34 39 87.1
pod 19 21 90.4
total 308 385 80.0


line stmt bran cond sub pod time code
1             # You may distribute under the terms of either the GNU General Public License
2             # or the Artistic License (the same terms as Perl itself)
3             #
4             # (C) Paul Evans, 2014-2021 -- leonerd@leonerd.org.uk
5              
6 6     6   471874 use v5.26;
  6         59  
7 6     6   438 use Object::Pad 0.57;
  6         7611  
  6         24  
8              
9             package Device::Chip::nRF24L01P 0.06;
10             class Device::Chip::nRF24L01P
11 1     1   444 :isa(Device::Chip);
  1         12277  
  1         30  
12              
13 6     6   1373 use Carp;
  6         8  
  6         328  
14 6     6   2218 use Data::Bitfield qw( bitfield boolfield enumfield intfield );
  6         10025  
  6         424  
15              
16 6     6   39 use Future::AsyncAwait;
  6         9  
  6         28  
17              
18 6     6   239 use constant PROTOCOL => "SPI";
  6         12  
  6         2594  
19              
20             =head1 NAME
21              
22             C - chip driver for a F
23              
24             =head1 DESCRIPTION
25              
26             This L subclass provides specific communication to a
27             F F chip attached to a computer via an SPI
28             adapter.
29              
30             The reader is presumed to be familiar with the general operation of this chip;
31             the documentation here will not attempt to explain or define chip-specific
32             concepts or features, only the use of this module to access them.
33              
34             =cut
35              
36             =head1 MOUNT PARAMETERS
37              
38             =head2 ce
39              
40             The name of the GPIO line on the adapter that is connected to the Chip Enable
41             (CE) pin. This module defaults to using the C line on a F, or
42             C on an F; for other adapter types the parameter will have to
43             be supplied.
44              
45             =cut
46              
47             my %DEFAULT_CE = (
48             'Device::Chip::Adapter::BusPirate' => "AUX",
49             'Device::Chip::Adapter::FTDI' => "D4",
50             );
51              
52             has $_gpio_ce;
53              
54 5         10 async method mount ( $adapter, %params )
  5         8  
  5         8  
  5         7  
55 5         12 {
56 5   33     40 my $ce_pin = $params{ce} // $DEFAULT_CE{ref $adapter} // "CE";
      50        
57              
58 5         10 $_gpio_ce = $ce_pin;
59              
60 5         54 await $self->SUPER::mount( $adapter, %params );
61              
62 5         716 await $self->protocol->write_gpios( { $ce_pin => 0 } );
63              
64 5         33268 return $self;
65 5     5 1 525 }
66              
67             method SPI_options
68 5     5 0 1228 {
69             return (
70 5         23 mode => 0,
71             max_bitrate => 1E6,
72             );
73             }
74              
75             =head1 METHODS
76              
77             The following methods documented in an C expression return L
78             instances.
79              
80             =cut
81              
82 0     0 0 0 async method power ( $on ) { await $self->protocol->power( $on ) }
  0         0  
  0         0  
  0         0  
  0         0  
  0         0  
83              
84             # Commands
85             use constant {
86 6         1224 CMD_R_REGISTER => 0x00,
87             CMD_W_REGISTER => 0x20,
88             CMD_R_RX_PAYLOAD => 0x61,
89             CMD_W_TX_PAYLOAD => 0xA0,
90             CMD_FLUSH_TX => 0xE1,
91             CMD_FLUSH_RX => 0xE2,
92             CMD_REUSE_TX_PL => 0xE3,
93             CMD_R_RX_PL_WID => 0x60,
94             CMD_W_ACK_PAYLOAD => 0xA8,
95             CMD_W_TX_PAYLOAD_NO_ACK => 0xB0,
96             CMD_NOP => 0xFF,
97 6     6   37 };
  6         8  
98              
99             # Register numbers and lengths, and bitfields
100             use constant {
101 6         27068 REG_CONFIG => [ 0x00, 1 ], # bitfield
102             REG_EN_AA => [ 0x01, 1 ], # per-pipe bitmask
103             REG_EN_RXADDR => [ 0x02, 1 ], # per-pipe bitmask
104             REG_SETUP_AW => [ 0x03, 1 ], # bitfield
105             REG_SETUP_RETR => [ 0x04, 1 ], # bitfield
106             REG_RF_CH => [ 0x05, 1 ], # int
107             REG_RF_SETUP => [ 0x06, 1 ], # bitfield
108             REG_STATUS => [ 0x07, 1 ], # bitfield
109             REG_OBSERVE_TX => [ 0x08, 1 ], # bitfield
110             REG_RPD => [ 0x09, 1 ], # bool
111             REG_RX_ADDR_P0 => [ 0x0A, 5 ], # addresses
112             REG_RX_ADDR_P1 => [ 0x0B, 5 ],
113             REG_RX_ADDR_P2 => [ 0x0C, 1 ],
114             REG_RX_ADDR_P3 => [ 0x0D, 1 ],
115             REG_RX_ADDR_P4 => [ 0x0E, 1 ],
116             REG_RX_ADDR_P5 => [ 0x0F, 1 ],
117             REG_TX_ADDR => [ 0x10, 5 ],
118             REG_RX_PW_P0 => [ 0x11, 1 ], # ints
119             REG_RX_PW_P1 => [ 0x12, 1 ],
120             REG_RX_PW_P2 => [ 0x13, 1 ],
121             REG_RX_PW_P3 => [ 0x14, 1 ],
122             REG_RX_PW_P4 => [ 0x15, 1 ],
123             REG_RX_PW_P5 => [ 0x16, 1 ],
124             REG_FIFO_STATUS => [ 0x17, 1 ], # bitfield
125             REG_DYNPD => [ 0x1C, 1 ], # per-pipe bitmask
126             REG_FEATURE => [ 0x1D, 1 ], # bitfield
127 6     6   34 };
  6         9  
128              
129             bitfield { unrecognised_ok => 1 }, CONFIG =>
130             MASK_RX_DR => boolfield(6),
131             MASK_TX_DS => boolfield(5),
132             MASK_MAX_RT => boolfield(4),
133             EN_CRC => boolfield(3),
134             CRCO => enumfield(2, 1, 2 ),
135             PWR_UP => boolfield(1),
136             PRIM_RX => boolfield(0);
137              
138             bitfield { unrecognised_ok => 1 }, SETUP_AW =>
139             AW => enumfield(0, undef, 3, 4, 5 );
140              
141             bitfield { unrecognised_ok => 1 }, SETUP_RETR =>
142             ARD => enumfield(4, map { ( $_ + 1 ) * 250 } 0 .. 15),
143             ARC => intfield(0, 4);
144              
145             bitfield { unrecognised_ok => 1 }, RF_SETUP =>
146             CONT_WAVE => boolfield(7),
147             RF_DR_LOW => boolfield(5),
148             PLL_LOCK => boolfield(4),
149             RF_DR_HIGH => boolfield(3),
150             RF_PWR => enumfield(1, -18, -12, -6, 0 );
151              
152             bitfield STATUS =>
153             RX_DR => boolfield(6),
154             TX_DS => boolfield(5),
155             MAX_RT => boolfield(4),
156             RX_P_NO => enumfield(1, 0,1,2,3,4,5 ),
157             TX_FULL => boolfield(0);
158              
159             bitfield OBSERVE_TX =>
160             PLOS_CNT => intfield(4, 4),
161             ARC_CNT => intfield(0, 4);
162              
163             bitfield FIFO_STATUS =>
164             TX_REUSE => boolfield(6),
165             TX_FULL => boolfield(5),
166             TX_EMPTY => boolfield(4),
167             RX_FULL => boolfield(1),
168             RX_EMPTY => boolfield(0);
169              
170             bitfield { unrecognised_ok => 1 }, FEATURE =>
171             EN_DPL => boolfield(2),
172             EN_ACK_PAY => boolfield(1),
173             EN_DYN_ACK => boolfield(0);
174              
175             =head2 clear_caches
176              
177             $nrf->clear_caches
178              
179             The chip object stores a cache of the register values it last read or wrote,
180             so it can optimise updates of configuration. This method clears these caches,
181             ensuring a fresh SPI transfer next time the register needs to be read.
182              
183             This should not normally be necessary, other than for debugging.
184              
185             =cut
186              
187             has @_registers;
188              
189 0         0 method clear_caches ()
  0         0  
190 0     0 1 0 {
191 0         0 undef @_registers;
192             }
193              
194             =head2 latest_status
195              
196             $status = $nrf->latest_status
197              
198             Returns the latest cached copy of the status register from the most recent SPI
199             interaction. As this method does not perform any IO, it returns its result
200             immediately rather than via a Future.
201              
202             Returns a HASH reference containing the following boolean fields
203              
204             RX_DR TX_DS MAX_RT TX_FULL
205              
206             Also returned is a field called C, which is either a pipe number (0
207             to 5) or undef.
208              
209             =cut
210              
211             has $_latest_status;
212              
213 1         3 method latest_status ()
  1         1  
214 1     1 1 4577 {
215 1         4 return { unpack_STATUS( $_latest_status ) };
216             }
217              
218             =head2 reset_interrupt
219              
220             await $nrf->reset_interrupt;
221              
222             Clears the interrupt flags in the C register.
223              
224             =cut
225              
226 0         0 async method reset_interrupt ()
  0         0  
227 0         0 {
228 0         0 await $self->_write_register_volatile( REG_STATUS, chr pack_STATUS(
229             RX_DR => 1,
230             TX_DS => 1,
231             MAX_RT => 1
232             ) );
233 0     0 1 0 }
234              
235 23         28 async method _do_command ( $cmd, $data = "" )
  23         27  
  23         33  
  23         31  
236 23         35 {
237 23         71 my $buf = await $self->protocol->readwrite( chr( $cmd ) . $data );
238              
239 23         12878 $_latest_status = ord substr $buf, 0, 1, "";
240              
241 23         106 return $buf;
242 23     23   31 }
243              
244             =head2 read_status
245              
246             $status = await $nrf->read_status;
247              
248             Reads and returns the current content of the status register as a HASH
249             reference as per C.
250              
251             =cut
252              
253 0         0 async method read_status ()
  0         0  
254 0         0 {
255 0         0 await $self->_do_command( CMD_NOP );
256              
257 0         0 return $self->latest_status;
258 0     0 1 0 }
259              
260             # Always performs an SPI operation
261 15         16 async method _read_register_volatile ( $reg )
  15         17  
  15         16  
262 15         21 {
263 15         20 my ( $regnum, $len ) = @$reg;
264              
265 15         43 my $val = await $self->_do_command( CMD_R_REGISTER | $regnum, ( "\0" x $len ) );
266              
267 15         634 $_registers[$regnum] = $val;
268 15         34 return $val;
269 15     15   19 }
270              
271             # Returns the cached value if present
272 24         26 async method _read_register ( $reg )
  24         24  
  24         21  
273 24         62 {
274 24         28 my ( $regnum ) = @$reg;
275              
276 24 100       80 defined $_registers[$regnum] ?
277             return $_registers[$regnum] :
278             return await $self->_read_register_volatile( $reg );
279 24     24   27 }
280              
281             # Always performs an SPI operation
282 2         39 async method _write_register_volatile ( $reg, $data )
  2         4  
  2         4  
  2         1  
283 2         4 {
284 2         4 my ( $regnum, $len ) = @$reg;
285 2 50       6 $len == length $data or croak "Attempted to write the wrong length";
286              
287 2         5 await $self->_do_command( CMD_W_REGISTER | $regnum, $data );
288              
289 2         97 $_registers[$regnum] = $data;
290 2         6 return;
291 2     2   3 }
292              
293             # Doesn't bother if no change
294 12         12 async method _write_register ( $reg, $data )
  12         12  
  12         13  
  12         11  
295 12         21 {
296 12         15 my ( $regnum ) = @$reg;
297              
298             return if
299 12 100 66     61 defined $_registers[$regnum] and $_registers[$regnum] eq $data;
300              
301 2         5 await $self->_write_register_volatile( $reg, $data );
302 12     12   915 }
303              
304             =head2 read_config
305              
306             $config = await $nrf->read_config;
307              
308             =head2 change_config
309              
310             await $nrf->change_config( %config );
311              
312             Reads or writes the chip-wide configuration. This is an amalgamation of all
313             the non-pipe-specific configuration registers; C, C,
314             C, C, C, C and C.
315              
316             When reading, the fields are returned in a HASH reference whose names are the
317             original bitfield names found in the F data sheet. When
318             writing, these fields are accepted as named parameters to the C
319             method directly.
320              
321             Some of the fields have special processing for convenience. They are:
322              
323             =over 4
324              
325             =item * CRCO
326              
327             Gives the CRC length in bytes, as either 1 or 2.
328              
329             =item * AW
330              
331             Gives the full address width in bytes, between 3 and 5.
332              
333             =item * ARD
334              
335             Gives the auto retransmit delay in microseconds directly; a multiple of 250
336             between 250 and 4000.
337              
338             =item * RF_DR
339              
340             Gives the RF data rate in bytes/sec; omits the C and C
341             fields; as 250000, 1000000 or 2000000
342              
343             =item * RF_PWR
344              
345             Gives the RF output power in dBm directly, as -18, -12, -6 or 0.
346              
347             =item * TX_ADDR
348              
349             Gives the PTX address as a string of 5 capital hexadecimal encoded octets,
350             separated by colons.
351              
352             =back
353              
354             Whenever the config is read it is cached within the C<$chip> instance.
355             Whenever it is written, any missing fields in the passed configuration are
356             pre-filled by the cached config, and only those registers that need writing
357             will be written.
358              
359             =cut
360              
361             sub _unpack_addr ( $addr )
362 3     3   619 {
  3         3  
  3         4  
363 3         15 return join ":", map { sprintf "%02X", ord } split //, $addr;
  15         41  
364             }
365              
366             sub _pack_addr ( $addr )
367 1     1   395 {
  1         2  
  1         2  
368 1         4 return join "", map { chr hex } split m/:/, $addr;
  5         13  
369             }
370              
371             sub _unpack_config ( %regs )
372 2     2   3 {
  2         5  
  2         2  
373             my %config = (
374             unpack_CONFIG ( $regs{config} ),
375             unpack_SETUP_AW ( $regs{setup_aw} ),
376             unpack_SETUP_RETR( $regs{setup_retr} ),
377             RF_CH => $regs{rf_ch},
378             unpack_RF_SETUP ( $regs{rf_setup} ),
379             TX_ADDR => _unpack_addr( $regs{tx_addr} ),
380 2         7 unpack_FEATURE ( $regs{feature} ),
381             );
382              
383             # RF_DR is split across two discontiguous bits - currently Data::Bitmask
384             # can't support this
385 2         90 $config{RF_DR} = ( 1E6, 2E6, 250E6, undef )[ delete($config{RF_DR_HIGH}) + 2 * delete($config{RF_DR_LOW}) ];
386              
387 2         32 return %config;
388             }
389              
390             sub _pack_config ( %config )
391 1     1   2 {
  1         5  
  1         2  
392             # RF_DR is split across two discontiguous bits - currently Data::Bitmask
393             # can't support this
394 1         2 for( delete $config{RF_DR} ) {
395 1 50       5 $config{RF_DR_LOW} = 1, $config{RF_DR_HIGH} = 0, last if $_ == 250E3;
396 1 50       2 $config{RF_DR_LOW} = 0, $config{RF_DR_HIGH} = 0, last if $_ == 1E6;
397 1 50       4 $config{RF_DR_LOW} = 0, $config{RF_DR_HIGH} = 1, last if $_ == 2E6;
398 0         0 croak "Unsupported 'RF_DR'";
399             }
400              
401             return
402             config => pack_CONFIG ( %config ),
403             setup_aw => pack_SETUP_AW ( %config ),
404             setup_retr => pack_SETUP_RETR( %config ),
405             rf_ch => $config{RF_CH},
406             rf_setup => pack_RF_SETUP ( %config ),
407 1         6 tx_addr => _pack_addr( $config{TX_ADDR} ),
408             feature => pack_FEATURE ( %config ),
409             }
410              
411 2         2 async method read_config ()
  2         4  
412 2         5 {
413             my @vals = await Future->needs_all(
414 2         4 map { $self->_read_register( $_ ) }
415             REG_CONFIG, REG_SETUP_AW, REG_SETUP_RETR, REG_RF_CH, REG_RF_SETUP, REG_TX_ADDR, REG_FEATURE,
416             );
417              
418 2         263 $_ = ord $_ for @vals[0,1,2,3,4,6]; # [5] is TX_ADDR
419 2         3 my %regs;
420 2         8 @regs{qw( config setup_aw setup_retr rf_ch rf_setup tx_addr feature )} = @vals;
421              
422 2         7 return { _unpack_config %regs };
423 2     2 1 173 }
424              
425 1         1 async method change_config ( %changes )
  1         3  
  1         1  
426 1         3 {
427 1         3 my $config = await $self->read_config;
428              
429 1         30 my %new_registers = _pack_config %$config, %changes;
430              
431 1         79 my @f;
432 1         3 foreach (qw( config setup_aw setup_retr rf_ch rf_setup feature )) {
433 6         978 push @f, $self->_write_register( $self->${\"REG_\U$_"}, chr $new_registers{$_} );
  6         36  
434             }
435 1         14 push @f, $self->_write_register( REG_TX_ADDR, $new_registers{tx_addr} );
436              
437 1         14 await Future->needs_all( @f );
438 1         121 return;
439 1     1 1 490 }
440              
441             =head2 read_rx_config
442              
443             $config = await $nrf->read_rx_config( $pipeno );
444              
445             =head2 change_rx_config
446              
447             await $nrf->change_rx_config( $pipeno, %config );
448              
449             Reads or writes the per-pipe RX configuration. This is composed of the
450             per-pipe bits of the C and C registers and its
451             C register.
452              
453             Addresses are given as a string of 5 octets in capitalised hexadecimal
454             notation, separated by colons.
455              
456             When reading an address from pipes 2 to 5, the address of pipe 1 is used to
457             build a complete address string to return. When writing and address to these
458             pipes, all but the final byte is ignored.
459              
460             =cut
461              
462 1         2 async method read_rx_config ( $pipeno )
  1         2  
  1         1  
463 1         2 {
464 1 50 33     6 $pipeno >= 0 and $pipeno < 6 or croak "Invalid pipe number $pipeno";
465 1         2 my $mask = 1 << $pipeno;
466              
467             my ( $en_aa, $en_rxaddr, $dynpd, $width, $addr, $p1addr ) =
468             await Future->needs_all(
469             map { $self->_read_register( $_ ) }
470             REG_EN_AA, REG_EN_RXADDR, REG_DYNPD, # bitwise
471 1         2 $self->${\"REG_RX_PW_P$pipeno"}, $self->${\"REG_RX_ADDR_P$pipeno"},
472             # Pipes 2 to 5 share the first 4 octects of PIPE1's address
473             ( $pipeno >= 2 ? REG_RX_ADDR_P1 : () ),
474             );
475              
476 1         123 $_ = ord $_ for $en_aa, $en_rxaddr, $dynpd, $width;
477              
478 1 50       3 $addr = substr( $p1addr, 0, 4 ) . $addr if $pipeno >= 2;
479              
480             return {
481 1         4 EN_AA => !!( $en_aa & $mask ),
482             EN_RXADDR => !!( $en_rxaddr & $mask ),
483             DYNPD => !!( $dynpd & $mask ),
484             RX_PW => $width,
485             RX_ADDR => _unpack_addr $addr,
486             };
487 1     1 1 1847 }
488              
489 1         2 async method change_rx_config ( $pipeno, %changes )
  1         2  
  1         2  
  1         1  
490 1         2 {
491 1 50 33     6 $pipeno >= 0 and $pipeno < 6 or croak "Invalid pipe number $pipeno";
492 1         2 my $mask = 1 << $pipeno;
493              
494 1         2 my $REG_RX_PW_Pn = $self->${\"REG_RX_PW_P$pipeno"};
  1         5  
495 1         2 my $REG_RX_ADDR_Pn = $self->${\"REG_RX_ADDR_P$pipeno"};
  1         3  
496              
497             my ( $en_aa, $en_rxaddr, $dynpd, $width, $addr ) =
498             await Future->needs_all(
499 1         3 map { $self->_read_register( $_ ) }
500             REG_EN_AA, REG_EN_RXADDR, REG_DYNPD, $REG_RX_PW_Pn, $REG_RX_ADDR_Pn
501             );
502              
503 1         116 $_ = ord $_ for $en_aa, $en_rxaddr, $dynpd, $width;
504              
505 1 50       3 if( exists $changes{EN_AA} ) {
506 0         0 $en_aa &= ~$mask;
507 0 0       0 $en_aa |= $mask if $changes{EN_AA};
508             }
509 1 50       3 if( exists $changes{EN_RXADDR} ) {
510 0         0 $en_rxaddr &= ~$mask;
511 0 0       0 $en_rxaddr |= $mask if $changes{EN_RXADDR};
512             }
513 1 50       2 if( exists $changes{DYNPD} ) {
514 0         0 $dynpd &= ~$mask;
515 0 0       0 $dynpd |= $mask if $changes{DYNPD};
516             }
517 1 50       3 if( exists $changes{RX_PW} ) {
518 1         2 $width = $changes{RX_PW};
519             }
520 1 50       2 if( exists $changes{RX_ADDR} ) {
521 0         0 $addr = _pack_addr $changes{RX_ADDR};
522 0 0       0 $addr = substr( $addr, -1 ) if $pipeno >= 2;
523             }
524              
525             await Future->needs_all(
526             $self->_write_register( REG_EN_AA, chr $en_aa ),
527             $self->_write_register( REG_EN_RXADDR, chr $en_rxaddr ),
528             $self->_write_register( REG_DYNPD, chr $dynpd ),
529             $self->_write_register( $REG_RX_PW_Pn, chr $width ),
530             $self->_write_register( $REG_RX_ADDR_Pn, $addr ),
531 1         4 );
532              
533 1         119 return;
534 1     1 1 3268 }
535              
536             =head2 observe_tx_counts
537              
538             $counts = await $nrf->observe_tx_counts;
539              
540             Reads the C register and returns the two counts from it.
541              
542             =cut
543              
544 1         2 async method observe_tx_counts ()
  1         1  
545 1         2 {
546 1         3 my $buf = await $self->_read_register_volatile( REG_OBSERVE_TX );
547              
548 1         64 return { unpack_OBSERVE_TX( ord $buf ) };
549 1     1 1 73 }
550              
551             =head2 rpd
552              
553             $rpd = await $nrf->rpd;
554              
555             Reads the C register
556              
557             =cut
558              
559 1         2 async method rpd ()
  1         1  
560 1         2 {
561 1         3 my $buf = await $self->_read_register_volatile( REG_RPD );
562              
563 1         75 return ( ord $buf ) & 1;
564 1     1 1 3025 }
565              
566             =head2 fifo_status
567              
568             $status = await $nrf->fifo_status;
569              
570             Reads the C register and returns the five bit fields from it.
571              
572             =cut
573              
574 1         1 async method fifo_status ()
  1         2  
575 1         3 {
576 1         3 my $buf = await $self->_read_register_volatile( REG_FIFO_STATUS );
577              
578 1         44 return { unpack_FIFO_STATUS( ord $buf ) };
579 1     1 1 2093 }
580              
581             =head2 pwr_up
582              
583             await $nrf->pwr_up( $pwr );
584              
585             A convenient shortcut to setting the C configuration bit.
586              
587             =cut
588              
589 0         0 async method pwr_up ( $pwr )
  0         0  
  0         0  
590 0         0 {
591 0         0 await $self->change_config( PWR_UP => $pwr );
592 0     0 1 0 }
593              
594             =head2 chip_enable
595              
596             await $nrf->chip_enable( $ce );
597              
598             Controls the Chip Enable (CE) pin of the chip.
599              
600             =cut
601              
602 1         2 async method chip_enable ( $ce )
  1         1  
  1         2  
603 1         3 {
604 1         2 await $self->protocol->write_gpios( { $_gpio_ce => $ce } );
605 1     1 1 70 }
606              
607             =head2 read_rx_payload_width
608              
609             $len = await $nrf->read_rx_payload_width;
610              
611             Returns the width of the most recently received payload, when in C mode.
612             Remember that C needs to be enabled (using C) on both the
613             transmitter and receiver before this will work.
614              
615             =cut
616              
617 1         2 async method read_rx_payload_width ()
  1         1  
618 1         3 {
619 1         4 return ord await $self->_do_command( CMD_R_RX_PL_WID, "\0" );
620 1     1 1 82 }
621              
622             =head2 read_rx_payload
623              
624             $data = await $nrf->read_rx_payload( $len );
625              
626             Reads the most recently received RX FIFO payload buffer.
627              
628             =cut
629              
630 1         2 async method read_rx_payload ( $len )
  1         2  
  1         1  
631 1         2 {
632 1 50 33     6 $len > 0 and $len <= 32 or croak "Invalid RX payload length $len";
633              
634 1         12 return await $self->_do_command( CMD_R_RX_PAYLOAD, "\0" x $len )
635 1     1 1 2981 }
636              
637             =head2 write_tx_payload
638              
639             await $nrf->write_tx_payload( $data, %opts );
640              
641             Writes the next TX FIFO payload buffer. Takes the following options:
642              
643             =over 4
644              
645             =item no_ack => BOOL
646              
647             If true, uses the C command, requesting that this payload
648             does not requre auto-ACK.
649              
650             =back
651              
652             =cut
653              
654 2         3 async method write_tx_payload ( $data, %opts )
  2         5  
  2         5  
  2         5  
655 2         9 {
656 2         4 my $len = length $data;
657 2 50 33     16 $len > 0 and $len <= 32 or croak "Invalid TX payload length $len";
658              
659 2 100       9 my $cmd = $opts{no_ack} ? CMD_W_TX_PAYLOAD_NO_ACK : CMD_W_TX_PAYLOAD;
660              
661 2         9 await $self->_do_command( $cmd, $data );
662 2         99 return;
663 2     2 1 3329 }
664              
665             =head2 flush_rx_fifo
666              
667             await $nrf->flush_rx_fifo;
668              
669             =head2 flush_tx_fifo
670              
671             await $nrf->flush_tx_fifo;
672              
673             Flush the RX or TX FIFOs, discarding all their contents.
674              
675             =cut
676              
677 1         2 async method flush_rx_fifo ()
  1         1  
678 1         2 {
679 1         3 await $self->_do_command( CMD_FLUSH_RX );
680 1         47 return;
681 1     1 1 3345 }
682              
683 1         2 async method flush_tx_fifo ()
  1         1  
684 1         3 {
685 1         3 await $self->_do_command( CMD_FLUSH_TX );
686 1         47 return;
687 1     1 1 1717 }
688              
689             =head1 AUTHOR
690              
691             Paul Evans
692              
693             =cut
694              
695             0x55AA;